🛠 Mesures RF conduites, errata silicium : du kit vers la carte finale

The kit has a real RF output

The PCB integrates a 2.4 GHz trace antenna and an RF test connector SWF (Murata MM8130-2600) connected to the radio via an internal switch: by placing the tuning probe MXHS83QE3000, you disconnect the antenna and output the conducted signal — with approximately 1.0 dB of loss at 2440 MHz according to the User Guide, to be subtracted from your measurements. This is the tool for: validating actual power (the SoC transmits from −20 to +8 dBm in 4 dB steps), measuring sensitivity (−96 dBm in LE 1 Mbps, −103 dBm in Long Range 125 kbps), or characterizing Direction Finding firmware (AoA/AoD) without an anechoic chamber.

Read the errata list before designing

Nordic publishes anomalies by revision — a reflex to have before layout, not after. On Rev 2 (QIAA-Bx0, QDAA-Bx0, CJAA-Bx0), for example: [20] invalid RTC register values, [36] CLOCK registers not reset when expected, [55] I2S events after STOP, [66] temperature sensor linearity. A separate bundle exists for Engineering A. Workarounds are applied by NCS/Zephyr — but on bare-metal or a custom driver, you are the one porting the fix. The embedded temperature sensor, for example, is only as good as errata [66] allows: do not use it as a precision thermostat without reading the datasheet.

Pin traps to resolve in the devicetree

The DK User Guide documents silicon factory defects that your custom board must handle:

• P0.09/P0.10: NFC by default → CONFIG_NFCT_PINS_AS_GPIOS to use them as GPIOs.
• P0.18: reset inactive by default → CONFIG_GPIO_AS_PINRESET or nrfjprog --pinresetenable.
• P0.00/P0.01: consumed by the 32.768 kHz crystal (reserved for X2 by default on the kit) — and this crystal is required for ANT/ANT+.
• Kit buttons without external pull-ups: on the custom side, provide the components or configure the internal pull-ups.

The official path to a custom board

Nordic Academy assumes this: the "add support for a custom board" exercise in the NCS Intermediate course is explicitly based on the nRF52833 DK. The approach: start from the nrf52833dk devicetree (LEDs on P0.13-P0.16 active-low, buttons P0.11/P0.12/P0.24/P0.25, J-Link OB), duplicate the definition for your board, describe your pins, your regulators (the SoC has integrated DC/DC + LDO), your target choice — and reflash via your own probe or the kit in probe mode (see the external J-Link tutorial).

Consider the nRF52820 variant

The same kit PCB supports the nrf52833dk/nrf52820 target: the nRF52820 chip is the little brother (256 KB flash / 32 KB RAM on the target side, smaller package) — if your product does not need the 512/128 KB of the nRF52833, validate the build on this target early, as RAM constraints change everything (BLE buffers, Thread stack).

Final checks before layout

1. Radio: antenna reuse or conducted connector, keeping sensitivity figures in mind.
2. Clocks: 32 MHz + 32.768 kHz crystals depending on usage (Thread/BLE with precision, ANT/ANT+ requires the 32 k).
3. Temperature: the component is qualified −40 to +105 °C — your assembly and battery, less.
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